[ieeetcsc-discuss] CFP: CATARS'08 (in conjunction with DSN'08) Workshop on Compiler and Architectural Techniques for Application Reliability and Security
Dongyan Xu
dxu at cs.purdue.edu
Thu Feb 21 21:34:50 PST 2008
Sincere apologies if you receive multiple copies of this CFP.
8-<---------------------------------------------------------------
Workshop on Compiler and Architectural
Techniques for Application
Reliability and Security (CATARS)
===================================================================
In Conjunction with the IEEE International Conference on Dependable
Systems and Networks (DSN) www.dsn.org
June 26th, 2008, Anchorage, Alaska, USA
Website: http://www.ece.cmu.edu/~koopman/dsn08/catars08.html
Important Dates
----------------
Paper Submissions Due: March 7th, 2008
Acceptance Notification: April 11th, 2008
Final Papers Due: May 1st, 2008
Theme and Goals
----------------
As computer systems grow more and more complex, it becomes harder to
ensure that they operate in a reliable and secure fashion. The problem
is especially severe at the application-level, due to the diversity of
software platforms and the ever-increasing demand for adding new features
in applications. Manual addition of ad-hoc techniques to ensure application
fault and attack tolerance may be error-prone and runs the risk of missing
important reliability loopholes and security vulnerabilities. This in turn
can lead to catastrophic failures and devastating attacks. Compiler and
architectural techniques can play a crucial role in automating both
detection of and recovery from errors and attacks in applications.
The goal of this workshop is to provide a forum for researchers in the
dependability and security communities to interact with compiler designers
and computer architects, so that effective cross-pollination of ideas can
occur between these areas. Further, the workshop will stress on the
importance of designing for reliability and security in the computer
architecture and compiler communities, where traditionally the emphasis
has been on performance enhancement.
List of Topics
---------------
The workshop is open to all interested researchers working on
dependability and security as well as on computer architecture and
compilers. We encourage submissions including but not limited to the
following topics:
* Automated derivation and runtime enforcement of application invariants
* Compile-time techniques for finding programming errors and security
violations
* Compiler and runtime techniques to aid development of distributed,
fault-tolerant programs
* Novel application-level code and data duplication techniques (in hardware
or software)
* Static Analysis to ensure conformance to reliability and security properties
* Automated generation of fault-tolerant and attack-tolerant programs
* Micro-architectural techniques for runtime error detection and containment
* Architectural support for diagnosing and understanding application
failures/compromises
* Memory organization schemes for enabling detection of and recovery from
errors and attacks
* Design and Implementation of reconfigurable hardware for executing
application checks
* Reliability and security issues exposed due to multi-core processors and
their mitigation
* Novel programming language-level constructs for building fault-tolerant
applications
* Metrics for assessing application vulnerability to errors and security
attacks
* Verifiable byte-code/intermediate language and secure runtime
infrastructures
* Software obfuscation and hardware tamper-resistance
Submission Information
------------------------
Submitted papers must be original work with no substantial overlap with papers
that have been published or that are simultaneously published to a journal or
conference with proceedings.
Papers should be at most 6 pages in IEEE proceedings style (two-column pages,
single space, using 10 point font and 1-inch margins) including all figures and
references.
We also encourage position papers and work-in-progress reports. These will be
refereed based on the novelty of the idea and the ability to generate
discussion at the workshop. Position-papers and work-in-progress reports
must be clearly marked as such.
Submitted papers will be fully refereed by PC members. Accepted papers will be
published in the supplemental volume of DSN 2008 proceedings (not archived in
the IEEE digital library).
Submission will be via the web. Please check the workshop website
(http://www.ece.cmu.edu/~koopman/dsn08/catars08.html) for details.
Program Co-Chairs:
------------------
Karthik Pattabiraman, University of Illinois at Urbana-Champaign, IL
(pattabir at uiuc.edu)
Shuo Chen, Microsoft Research, Redmond, WA
(shuochen at microsoft.com)
Zbigniew Kalbarczyk, University of Illinois at Urbana-Champaign, IL
(kalbar at crhc.uiuc.edu)
Program Committee
------------------
Todd Austin, University of Michigan (Ann Arbor)
Emery Berger, University of Massachusetts (Amherst)
Michael Hicks, University of Maryland (College Park)
Subhasish Mitra, Stanford University
Shubu Mukherjee, Intel Corporation
Onur Mutlu, Microsoft Research (Redmond)
Priya Narasimhan, Carnegie Mellon University
Sanjay Patel, University of Illinois (Urbana-Champaign)
Josyula Rao, IBM T J Watson Research Center
Zhendong Su, University of California (Davis)
Timothy Tsai, Hitachi Corporation
Dongyan Xu, Purdue University (West Lafayette)
Jun Xu, Google Inc
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