[ieeetcsc-discuss] Extended Deadline: LSPP Workshop

Alex Jones akjones at ece.pitt.edu
Wed Dec 12 09:12:40 PST 2007


Dear colleagues,

Apologies if you receive multiple copies of this Call for Papers.
Please feel free to distribute it to those who might be interested.
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                            Final Call For Papers
            Extended deadline for submission: December 14th 2007
     In conjunction with a special issue of Parallel Processing Letters

               Workshop on Large-Scale Parallel Processing
                            to be held at the
      IEEE International Parallel and Distributed Processing Symposium
                              Miami, Florida
                           April 14th - 18th 2008

                       http://www.ccs3.lanl.gov/LSPP/

The workshop on Large-Scale Parallel Processing is a forum that focuses
on computer systems that utilize thousands of processors and
beyond. This is a very active area given the goals by many world-wide to
enhance science-bysimulation by installing large-scale peta-flop systems
at the start of the next decade. Large-scale systems, referred to by
some as extreme-scale and Ultra-scale, have many important research
aspects that need detailed examination in order for their effective
design, deployment, and utilization to take place. These include
handling the substantial increase in multi-core on a chip, the ensuing
interconnection hierarchy, communication, and synchronization
mechanisms. The workshop aims to bring together researchers from
different communities working on challenging problems in this area for a
dynamic exchange of ideas. Work at early stages of development as well
as work that has been demonstrated in practice is equally welcome.

Of particular interest are papers that identify and analyze novel ideas
rather than providing incremental advances in the following areas:

Large-scale systems:
exploiting parallelism at large-scale, the coordination of large numbers
of processing elements, synchronization and communication at
large-scale, programming models and productivity

Multi-core:
utilization of increased parallelism on a single chip (MPP on a chip
such as the Cell and GPUs), the possible integration of these into
large-scale systems, and dealing with the resulting hierarchical
connectivity.

Novel architectures and experimental systems:
the design of novel systems, the use of processors in memory (PIMS),
parallelism in emerging technologies, future trends.

Applications:
novel algorithmic and application methods, experiences in the design and
use of applications that scale to large-scales, overcoming of
limitations, performance analysis and insights gained.

Results of both theoretical and practical significance will be
considered, as well as work that has demonstrated impact at small-scale
that will also affect large-scale systems. Work may involve algorithms,
languages, various types of models, or hardware

Selected work presented at the workshop will be published in a special
issue of Parallel Processing Letters in late 2008


[Submission Guidelines]

Papers should not exceed eight single-space pages (including figures,
tables and references) using a 12-point font on 8.x11-inch
pages. Submissions in PostScript or PDF should be made using
EDAS. Informal enquiries can be made to djk at lanl.gov. Submissions will
be judged on correctness, originality, technical strength, significance,
presentation quality and appropriateness. Submitted papers should not
have appeared in or under consideration for another venue.

[Important Dates]

Papers due:                 December 14th 2007  *** Final Deadline ***
Notification of acceptance: January 11th 2008
Camera-Ready Papers due:    January 21th 2008


[Workshop Co-chairs]
Darren J. Kerbyson       Los Alamos National Laboratory)
Ram Rajamony             IBM Austin Research Lab
Charles Weems            University of Massachusetts

[Steering Committee]
Johnnie Baker            Kent State University
H.J. Siegel              Colorado State University

[Publicity Chair]
Alex Jones               University of Pittsburgh

[Program Committee]
Ghoerge Almasi           IBM T.J. Watson Research Lab
Taisuke Boku             University of Tsukuba, Japan
Barbara Chapman          University of Houston
Hank Dietz               University of Kentucky
Daniel Katz              Louisiana State University
John Levesque            Cray Inc.
John Michalakes          NCAR, Boulder
Celso Mendes             University of Illinois Urbana-Champagne
Bernd Mohr               Forschungszentrum Juelich, Germany
Stathis Papaefstathiou   Microsoft
Michael Scherger         Texas A&M University-Corpus Christi
Robert Walker            Kent State University
Harvey Wasserman         NERSC/LBNL
Gerhard Wellein          University of Erlangen, Germany
Pat Worley               Oak Ridge National Laboratory

Workshop General Chair and point of contact: Darren J. Kerbyson (djk at lanl.gov 
)

--
Alex K. Jones
Assistant Professor
Electrical and Computer Engineering
University of Pittsburgh
http://www.pitt.edu/~akj8






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